Final Program: 4th Symposium – 2015
Thursday, October 1
Session I: Opening Session
Moderator – E. Yablonovitch: University of California, Berkeley, USA
- 8:45 am – Opening Remarks
E. Yablonovitch and J. Bokor: University of California, Berkeley, USA - 9:00 am – Specialization for Energy Efficiency Using Agile Development
B. Nikolic, J. Bachrach, E. Alon, K. Asanovic, and D. Patterson: University of California, Berkeley, USA (Invited) - 9:25 am – Superconducting Computing: Lessons from an Emerging Technology
D. S. Holmes: IARPA, USA (Invited) - 9:50 am – Millivolt Switches Will Support Better Energy-Reliability Tradeoffs
E. Debenedictis and H. Zima: Sandia National Laboratory, USA - 10:05 am – SOTB Technology, which Enables Perpetually Reliable CPU for IoT Applications
K. Ishibashi, N. Sugii, K. Kobayashi, T. Koide, H. Nagatomi and S. Kamohara: University of Electro-Communications, Japan
Session II: Spintronics
Moderator – J. Bokor University of California, Berkeley, USA
- 10:40 am – Session Introduction
- 10:45 am – mLogic: All Spin Logic Device and Circuits
J.-G. Zhu, D. M. Bromberg, M. Moneck, V. Sokalski, and L. Pileggi: Carnegie Mellon University, USA (Invited) - 11:05 am – Electric-Field-Controlled MRAM based on Voltage Control of Magnetic Anisotropy (VCMA): Recent Progress and Perspectives
P. Khalili and K. Wang: University of California, Los Angeles, USA (Invited) - 11:24 am – Magnonic Holograph Graphic Designer Co-Processor: an Approach to Energy-Efficient Complementary Logic Circuitry
A. Khitun: University of California, Riverside, USA - 11:40 am – Quantitative Comparison of Power-Gating Architectures for FinFET-based Nonvolatile SRAM using SpintronicsRetention Technology
Y. Shuto, S. Yamamoto and S. Sugahara: Tokyo Institute of Technology, Japan - 11:55 am – Anomalous Properties of Sub-10-nm Magnetic Tunneling Junctions
M. Stone, J. Hong, R. Guduru, A. Hadjikhani, A. Manossaukis, E. Stimphil, P. Liang,J. Bokor and S. Khizroev: Florida International University, USA - 12:10 pm – Spintronics Panel
KEYNOTE PRESENTATION
Introduced by E. Yablonovitch: University of California, Berkeley, USA
Session III: Nanomechanical Logic
Moderator – N. Draeger: Lam Research, USA
- 2:25 pm – Session Introduction
- 2:30 pm – From Microelectromechanical Switches to Nanoelectromechanical Switches: Lessons and Differences
J.-B. Yoon: KAIST, Korea (Invited) - 2:55 pm – Operating Micromechanical Logic Gates Below kBT: Physical vs Logical Reversibility
M. López-Suárez, I. Neri, and L. Gammaitno: University Perugia, Italy (Invited) - 3:15 pm – Body-Biased Operation for Improved MEM Relay Energy Efficiency
A. Peschot, C. Qian, D. J. Connelly and T.-J. King Liu: University of California, Berkeley, USA - 3:30 pm – Tunneling Nanoelectromechanical Switches
F. Niroui, E. Sletten, Y. Song, A. Wang, W. J. Ong, Jing Kong, E. Yablonovitch, T. Swager, J. Lang and V. Bulovic: MIT, USA
Session IV: Novel Materials & Devices
Moderator – N. Kim: Applied Materials, USA
- 4:05 pm – Session Introduction
- 4:10 pm – Van der Waals Heterostructures for Tunnel Transistors
T. Roy, M. Tosun, M. Amani, D.-H. Lien, D. Kiriya, P. Zhao, S. Desai, A. Sachid,S. R.Madhvapathy, andA. Javey: University of California, Berkeley, USA (Invited) - 4:35 pm – 2D Tunnel Transistors for Ultra-Low Power Applications: Promises and Challenges
H. Ilatikhameneh, G. Klimeck and R. Rahman: Purdue University, USA - 4:50 pm – Understanding Negative Capacitance Dynamics in Ferroelectric Capacitors
A. Khan, K. Chatterjee, S. Salahuddin and R. Ramesh: University of California, Berkeley, USA - 5:05 pm – Walk to the Gordon and Betty Moore Lobby, Hearst Memorial Mining Building
- 5:25 pm – Poster Session and Reception
- 7:15 pm – Close of Day 1
Friday, October 2
Session V: Reconvening Session
Moderator – T. Theis: IBM and SRC, USA
- 9:00 am – Session Introduction
- 9:10am – From Nanodevices to Nanosystems: The N3XT Information Technology
S. Mitra: Stanford University, USA (Invited)
KEYNOTE PRESENTATION
Session VI: Nanoelectronics – Tunneling FET – 1
Moderator – O. Faynot: CEA-Leti, France
- 10:15 am – Session Introduction
- 10:20 am – Prospects for the Low-Voltage TFET: dW/dE vs Dit
T. Xiao, X. Zhao, S. Agarwal and E. Yablonovitch: University of California, Berkeley, USA - 10:35 am – A Framework for Generation and Recombination in Tunneling Field-Effect Transistors
J. Teherani, W. Chern, S. Agarwal, J. Hoyt and D. Antoniadis: MIT, USA
Session VII: Nanoelectronics – Tunneling FET – 2
Moderator – A. Seabaugh: University of Notre Dame, USA
- 11:10 am – Influence of Interface Traps on the Performance of Tunnel FETs
D. Esseni, M. Pala, E. Gnani and E. Sangiorgi: University of Udine, Italy (Invited) - 11:30 am – Challenges of Fulfilling the Promise of Tunnel FETs
S. Datta and R. Pandey: Pennsylvania State University, USA (Invited) - 11:50 am – Tunneling FET Device Technologies Using III-V and Ge Materials
S. Takagi,M.-S. Kim, M. Noguchi, K. Nishi and M. Takenaka: University of Tokyo, Japan (Invited) - 12:10 pm – Tunneling FET Panel
Session VIII: Optical Interconnects
Moderator – A. Krishnamoorthy: Oracle Corporation, USA
- 2:00 pm – Session Introduction
- 2:05 pm – Optical Antenna-Enhanced Nano LED for Energy-Efficient Optical Interconnect
M. C. Wu, E. Yablonovitch, S. Fortuna, M. Eggleston, and K. Messer: University of California, Berkeley, USA (Invited) - 2:25 pm – Photo Detection for Quantum Limit Operation of Optical links
C. Lalau Keraly, R. Going, M.C. Wu and E. Yablonovitch: University of California, Berkeley, USA - 2:40 pm – High-density 3D Electronic-Photonic Integration
V. Stojanovic: University of California, Berkeley, USA (Invited) - 3:00 pm – Optoelectronic Integration for Reduced Power Dissipation
De Dobbelaere: Luxtera, Inc, USA (Invited) - 3:20 pm – Silicon Photonics Panel
Symposium Closing - 3:45 pm – Closing Remarks
E. Yablonovitch and J. Bokor: University of California, Berkeley, USA - 4:00 pm – End of Symposium
2015 Organizing Committee
- Eli Yablonovitch, University of California, Berkeley (co-chair)
- Jeffrey Bokor, University of California, Berkeley (co-chair)
- Ajith Amerasekera, Texas Instruments
- John Bowers, University of California, Santa Barbara
- Olivier Faynot, CEA-Leti
- Ru Huang, Peking Univeristy
- Larry Pileggi, Carnegie Mellon University
- Johann Peter Reithmaier, Universität Kassel
- Enrico Sangiorgi, University of Bologna
- John Shalf, Lawrence Berkeley Laboratory
- Massood Tabib-Azar, University of Utah
- Thomas Theis, IBM & SRC
- Kang Wang, University of California, Los Angeles
- H.-S. Philip Wong, Stanford University
- Jun-Bo Yoon, KAIST
Thank You for Participating
When it was established in 2009, we could only imagine that this Symposium would convene for the fourth time. Since then, each Symposium has been more successful than the previous one. We would like to thank the 2015 Organizing Committee for developing such an interesting program.
The quality of the program rested on the invited and contributed papers, as well as the poster session. We would like to thank all of the presenters, many of whom traveled significant distances to make the 4th Symposium a huge success.
We included more back and forth discussion to make the 4th Symposium a lively event, promoting the interactive atmosphere that has always been our goal. Thanks must be accorded to the moderators, whose insightful questions contributed to making the panels the highlight of this year’s symposium.
The Berkeley Symposium on Energy Efficient Electronic Systems is a biennial event. Do come back in early 2017 for more information on the next Symposium. We look forward to seeing you at the 5th Symposium as we, together, will learn of further progress in this field.
Eli Yablonovitch, Co-ChairJeffrey Bokor, Co-Chair
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- Symposium Proceedings are available on IEEEXplore.